X-FAB is the leading analog/mixed-signal and MEMS foundry group manufacturing silicon wafers for automotive, industrial, consumer, medical and other applications. It offers modular CMOS and SOI processes in geometries ranging from 1.0 to 0.13 µm, and special SiC and MEMS long-lifetime processes.
X-FAB is the leading analog/mixed-signal and MEMS foundry group manufacturing silicon wafers for automotive, industrial, consumer, medical and other applications. Its customers worldwide benefit from the highest quality standards, manufacturing excellence and innovative solutions by using X-FAB’s modular CMOS and SOI processes in geometries ranging from 1.0 to 0.13 µm, and its special SiC and MEMS long-lifetime processes.
X-FAB’s analog-digital integrated circuits (mixed-signal ICs), sensors and micro-electro-mechanical systems (MEMS) are manufactured at six production facilities in Germany, France, Malaysia and the U.S. X-FAB employs about 3,800 people worldwide. To learn more, please visit www.xfab.com.
X-FAB will establish a comprehensive knowledge base on assembly/ package driven failure mechanisms and influences of wafer process and IC design related processes. Evaluate reliability impacts of processes for wafer-level packaging and 3D/ heterogeneous integration.
Also establish technology qualification vehicles for assessment of reliability on IC level with the possibility to apply application-relevant stress / test methods. Develop IC level screening guidelines based on acceleration models for failure mechanisms and analysis of statistical data from production.
X-FAB will utilize new knowledge base on assembly / package driven failure mechanisms for definition of standard assessment methods to become part of wafer process qualification (connection to WP 5). Deliver optimized process solutions for heterogeneous integration, in order to lower the failure rate and extend the lifetime of products.
Utilize new capabilities to develop and validate methods for failure prevention or detection, in order to lower the failure rate of products. Increase failure mode coverage in wafer process qualification in order to speed up the learning curve and to reduce the failure rate of products. Offer practically proven IC level screening guidelines for wafer processes, in order to lower the (early life) failure rate of products.