iRel40 partners organized a special issue at the 33rd European Safety and Reliability (ESREL) conference held at the University of Southampton, United Kingdom from 3-7 September 2023. ESREL is one of the most prominent conferences in safety and reliability, is an annual conference series run under the auspices of the European Safety and Reliability Association (ESRA). The conference dates to 1989, but it was not referred to as ESREL until 1992. The conference has become well established in the international community, attracting a good mix of academics and industry participants who present and discuss subjects of interest and application across various industries.
Techniques for prognostic and health management of electronic components typically rely either on physics-based or data-driven models. Within the iRel40 project, Sirris and Imec developed a framework to combine them via hybrid modelling and validated the methodology on a QFN package subject to die-delamination. The main results of this work are twofold. For diagnostics, the hybrid model can achieve better performance than the one obtained by the physics-based or data-driven models alone. For prognostics, the hybrid model can provide a precise forecast of the remaining useful life of the die.
Reliability of the drive train is essential for the automotive industry. Field failures are devastating for both manufactures and users, while unnecessary maintenance and downtime are expensive. The goal of iRel40’s industrial pilot IP-13 is to use sensor data in combination with novel data-driven AI-based methods and Physics-of-failure approaches to predict failures in automotive power electronics. Here, we demonstrate a proof of concept of a method allowing for monitoring health and prognosticating the Remaining Useful Life (RUL) of wire bonds in power transistors.
In the context of the iRel40 project, BSH Electrodomésticos España (BSHE) has studied the wire bonding breakage failure mechanism of a photodiode that integrates its induction cooktops, which is a consequence of applying strong thermal cycling. BSHE has performed an accelerated test consisting of the application of thermal cycling on the wire bonding/chip to test breakage, using the “Coffin-Manson equation” to determine the acceleration factor. The testing and a subsequent study of X-Ray spectroscopy and microscope filter images of the failed samples have allowed us to conclude that the failure is caused by the mismatch of coefficients of thermal expansion between the wire, the mold compound, and the silicon, causing a stress that the component is not capable to withstand. This conclusion has allowed BSHE to better define the factors that participate in the Coffin-Manson equation and thus be able to obtain a more accurate model for the estimation of the remaining useful life of this component. In addition, this has provided insights for the component’s supplier in order to develop a more robust and reliable component design and manufacturing process.
An all-digital hardware monitoring system at run-time to improve the reliability of electronic devices
This news describes a use case developed in the context of iRel40 (WP5 – T5.3.1) and presented at the ESREL 2023 conference. The main goal of such a use case is to show that it has been possible to exploit an all-digital hardware monitoring system at run-time to improve reliability with a focus on verification activities. For such a purpose, a pacemaker has been developed in two versions. One version has been based on a Commercial Off-The-Shelf microcontroller, where some properties have been verified by means of a classical offline traces analysis approach. The other version has been based on a soft-core Field Programmable Gate Array, where the same properties have been verified at run-time by means of the adopted all-digital hardware monitoring system. The comparison of the two verification approaches shows how it is possible (i) to reduce the time needed to perform verification and (ii) to provide the opportunity to verify more complex properties with respect to classical Built-In Self-Test approaches.